Extended phy addressing

Abstract

A method and apparatus is disclosed for extending PHY addressing in a telecommunications device beyond the number of PHYS that may be directly addressed over a bidirectional serial management control bus using a management bus protocol employing a predetermined number of address bits for PHY addressing. A plurality of serial bidirectional management control buses are provided and plural PHYS are coupled to each of the buses. A control processor is employed in conjunction with control logic to select one of the plurality of management control buses as the active bus at any one time to permit communication between the processor and a selected PHY on the respective bus. State machines within the programmable array logic are employed to selectively enable buffers within the control logic to allow the processor to write information to a PHY on a selected control bus or alternatively, to allow the processor to read information from a PHY on a selected control bus. In the above described manner, any desired number of PHYS may be addressed by a single control processor within the telecommunications device. Additionally, a serial peripheral channel within the processor is employed to offload the processor from control bus management functions. The serial peripheral channel is loaded by the control processor and the channel manages the serial communication over the control bus. In this manner, the bandwidth of the processor is available for port management and statistics gathering functions.