The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2001

Filed:

Jun. 12, 2000
Applicant:
Inventors:

Yong-cheol Bae, Seoul, KR;

Jung-hwa Lee, Suwon, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

An input and output line equalizing circuit for connection to a pair of input and output lines of a memory device. The equalizing circuit includes an equalization control circuit providing at an output a precharge signal, and an equalizing unit connected to the input and output lines. The equalizing unit responding to receipt of a precharge signal from the equalization control circuit to maintain the pair of input and output lines at the same voltage level. The equalizing control circuit includes a first transmission gate and a second transmission gate.


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