The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2001
Filed:
Jan. 18, 2000
Seungmoo Choi, Orlando, FL (US);
Agere Systems Guardian Corp., Murray Hill, NJ (US);
Abstract
A method for making a semiconductor device includes forming a plurality of transistors in a semiconductor substrate, forming a first dielectric layer overlying the semiconductor substrate, and selectively etching the first dielectric layer to form a first opening exposing a first transistor portion and a second transistor portion. Conducting material is deposited into the first opening to define a merged contact between the first transistor portion and the second transistor portion. The method further includes forming a second dielectric layer overlying the first dielectric layer and the merged contact, and selectively etching the second dielectric layer to form a second opening exposing the merged contact, and while selectively etching the second and first dielectric layers to form a third opening exposing a source/drain region of a third transistor to define a self-aligned contact. Conducting material is deposited into the second opening to define a first via with the merged contact, and conducting material is also deposited into the third opening to define a second via with the source/drain region of the third transistor. The self-aligned contact and the merged contact are formed using a reduced number of masks and masking steps.