The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2001
Filed:
Feb. 24, 1998
Applicant:
Inventors:
Mark L. Buer, Chandler, AZ (US);
David A. Auer, Gilbert, AZ (US);
Assignee:
VLSI Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 ;
U.S. Cl.
CPC ...
H03L 7/06 ;
Abstract
A circuit for programmably generating a delay in a frequency monitor. In one embodiment, the circuit includes a delay cell. A delay cell controller is coupled to the delay cell. The delay cell controller is adapted to selectively control whether the delay cell is activated such that the frequency monitor can be programmably configured to have a selected delay associated therewith.
Buer, Mark. (2001). Programmable delay path circuit and operating point frequency detection apparatus (U.S. Patent No. 6272439). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6272439
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile