The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2001

Filed:

Jun. 11, 1999
Applicant:
Inventors:

William F. Edwards, Livermore, CA (US);

Frederick Roland Schindler, Sunnyvale, CA (US);

Robert Gregory Twiss, Portola Valley, CA (US);

Assignee:

Cisco Technology Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 ;
U.S. Cl.
CPC ...
H05K 7/02 ;
Abstract

GBIC frames are mounted with respect to one or another or with respect to the printed circuit board so as to facilitate space sufficiency, e.g. of a front or other panel. In one aspect two GBIC frames are mounted in back-to-back fashion on opposite surfaces of a mounting plate of preferably minimal thickness. Plate cut-outs are positioned to accommodate frame feet or other mounting structures in a fashion off-set, on opposite faces, to avoid interference between frame legs. In one aspect, portions of GBICs and frames are received in cut-out or other edges of a PCB so that GBICs in frames straddle a major surface of a PCB to reduce height for accommodating 1RU or other form factors while increasing space efficiency.


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