The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2001

Filed:

Apr. 27, 1998
Applicant:
Inventors:

Yuichirou Takahashi, Sagamihara, JP;

Atsuto Kanazawa, Tokyo, JP;

Masaki Kariya, Yokohama, JP;

Masayuki Serizawa, Yokohama, JP;

Kenji Tamura, Yokohama, JP;

Kikuo Kobayashi, Yokohama, JP;

Masaaki Nakayama, Osaka, JP;

Hiromichi Tanaka, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 3/14 ; H04N 7/01 ;
U.S. Cl.
CPC ...
H04N 3/14 ; H04N 7/01 ;
Abstract

A color image pickup apparatus includes a photo-to-electric conversion section subjected to progressive scanning. A first delay circuit defers an output signal of the photo-to-electric conversion section. A first adder combines the output signal of the photo-to-electric conversion section and an output signal of the first delay circuit. A second delay circuit defers the output signal of the first delay circuit. A second adder combines the output signal of the photo-to-electric conversion section and an output signal of the second delay circuit. A third delay circuit defers an output signal of the first adder. A first subtracter implements subtraction between the output signal of the first adder and an output signal of the third delay circuit. A fourth delay circuit defers an output signal of the second adder. A second subtracter implements subtraction between the output signal of the second adder and an output signal of the fourth delay circuit. A first sign change circuit inverts a sign of an output signal of the first subtracter. A first selector periodically and alternately selects one of the output signal of the first subtracter and an output signal of the first sign change circuit. A second sign change circuit inverts a sign of an output signal of the second subtracter. A second selector periodically and alternately selects one of the output signal of the second subtracter and an output signal of the second sign change circuit. Two different color-difference signals are generated in response to an output signal of the first selector and an output signal of the second selector.


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