The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2001

Filed:

Mar. 01, 1999
Applicant:
Inventor:

Leopold Ernest Pellon, Mt. Holly, NJ (US);

Assignee:

Lockheed Martin Corporation, King of Prussia, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 ;
U.S. Cl.
CPC ...
H03M 1/66 ;
Abstract

A &Sgr;-&Dgr; analog-to-digital converter (ADC),includes a multibit &Sgr;-&Dgr; modulator,and a feedback loop,including a digital-to-analog converter (DAC),A nonlinear filter corrector,coupled to the multibit output port,o of the modulator,includes a transversal filter,weighting multipliers,coupled to the taps,of the transversal filter,and a summing arrangement,coupled to the multipliers, for creating a correction signal based on an estimate of the dynamic errors of the &Sgr;-&Dgr; ADC. A calibration arrangement,applies an alternating calibration signal to the input port,of the &Sgr;-&Dgr; ADC,and determines, from the output signal of the modulator,and from the known delays L of the delay elements of the transversal filter,the values of the weights required to correct dynamic errors of the DAC. In one version, the weighting multipliers are look-up tables.


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