The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 31, 2001
Filed:
Nov. 12, 1999
Alexander Shubat, Fremont, CA (US);
Virage Logic Corporation, Fremont, CA (US);
Abstract
The multiple-port memory device preferably comprises a first and second control logic having test circuitry. The first and second control logic are preferably adapted to receive both the clock signal and a test signal. The first and second control logic includes a clock control circuit that produces a clock signal (CCLK) that is used by other portions of the first and second control logic to assert the word lines. The clock control circuit also produces a control signal (EQ) that is used to control pre-charging transistor that form the first and second input/output circuits. The clock control circuit is particularly advantageous because it uses the test signal as an alternate control to activate the precharge circuits as desired for testing. Therefore, the present invention provides for direct control of portions of the memory array to allow the memory array to be tested under the most stressful conditions.