The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2001

Filed:

Apr. 02, 1999
Applicant:
Inventors:

Takahisa Eimori, Tokyo, JP;

Hiroshi Kimura, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/13205 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/13205 ;
Abstract

In a peripheral circuit region requiring a conductive path between layers at the periphery of a memory cell array region, a conductive path is provided, after removing a silicon nitride film used for self-alignment contact from the area of the contacting portion of a conductor, by forming an interlayer oxide film on the conductor and providing an opening through the interlayer oxide film. Alternatively, a conductive path is provided, after forming the interlayer oxide film on the silicon nitride film used for self-alignment contact, by forming an opening throughout the interlayer oxide film and silicon nitride film.


Find Patent Forward Citations

Eimori, Takahisa. (2001). Semiconductor device and manufacturing process thereof (U.S. Patent No. 6268278). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6268278

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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