The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2001

Filed:

Dec. 23, 1998
Applicant:
Inventors:

Jeffrey Paul Grundvig, Macungie, PA (US);

Wenzhe Luo, Allentown, PA (US);

Zhigang Ma, Bethlehem, PA (US);

Brian John Petryna, Lebanon, PA (US);

Assignee:

Agere Systems Guardian Corp., Miami Lakes, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 ;
U.S. Cl.
CPC ...
G06F 1/12 ;
Abstract

A glitchless clock switch in accordance with the principles of the present invention avoids the need to directly synchronize clock selection signals with the source clock. Instead, clock switching control signals are generated with relation to Finite-State-Machines (FSMs) for each clock signal. Thus, the cycle relationship of the different clock sources do not affect the clock switching process. The FSM for each clock has three states: ON, STOP, and IDLE. During the switching process, each clock signal enters its respective IDLE state. Detection of the ALL_IDLE state is synchronized with a directly derived signal from the newly selected clock. Any glitches in the switching process are isolated to the control of the synchronization of the ALL_IDLE state, which does not affect the output clock signal.


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