The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2001

Filed:

Dec. 30, 1998
Applicant:
Inventors:

Terukazu Yusa, Tokyo, JP;

Michiaki Kuroiwa, Tokyo, JP;

Koji Hirate, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

A ROM data verification circuit has a DMAC (,) for reading out data stored in the ROM (,) when a CPU (,) abandons to use an address bus (,) and a data bus (,), for dividing the data read into a plurality of divided data, and for outputting the divided data into a plurality of output ports (,) designated by addresses generated by the DMAC (,).


Find Patent Forward Citations

Yusa, Terukazu. (2001). Rom data verification circuit (U.S. Patent No. 6266626). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6266626

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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