The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2001
Filed:
Nov. 29, 1999
Chi-Chien Ho, Plano, TX (US);
William R. McKee, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A single polysilicon memory cell (,) provides a positive low programming and erase voltage together with a small cell size and includes P substrate (,) and P-well (,) formed within P substrate (,). NMOS transistor (,) is formed within P-well (,). N,control gate (,) is formed in P-well (,) and includes punch-through implant region (,). NMOS transistor (,) and N,control gate (,) have in common electrically isolated polysilicon gate (,) for operating as a floating gate in common with NMOS transistor (,) and N,control gate (,). N,control gate (,) includes P-channel punch-through implant (,) for increasing the capacitive coupling ratio. This improves programming and erasing efficiency within single polysilicon memory cell (,).