The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2001

Filed:

May. 03, 2000
Applicant:
Inventors:

Chorng-Wei Liaw, Huwei, TW;

Hau-Luen Tien, Taipei, TW;

Wei-Jye Lin, Chaujou Jen, TW;

Ming-Jang Lin, Taiping Shiang, TW;

Tian-Fure Shiue, Judung Jen, TW;

Huang-Chung Cheng, Hsinchu, TW;

Ching-Hsiang Hsu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/00 ;
U.S. Cl.
CPC ...
H02M 1/00 ;
Abstract

A power chip set for a switching mode power supply includes a high voltage chip and a control unit chip. The high voltage chip contains a switching power metal-oxide-semiconductor (MOS) transistor being turned on/off under control of an output signal from the control unit, and a junction field effect transistor (JFET) coupled between a drain of the switching power MOS transistor and a power terminal of the control unit to serve as a start up element for driving the control unit during initiation, in which the JFET has a negative threshold voltage and the absolute value thereof is equal to the voltage for driving the control unit. The JFET structure in the high voltage chip further includes a Zener diode for over voltage protection of the control unit. The high voltage chip further contains a current-sense power MOS transistor coupled with the drain of the switching power MOS transistor for detecting a drain current of the switching power MOS transistor. The chip set can be packaged into a power module.


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