Sacrificial silicon sidewall for damascene gate formation

Abstract

A method of fabricating MOSFET devices in which the gate polysilicon is not consumed during damascene etch back, comprising: (a) forming a gate stack on a surface of a silicon-containing substrate, said gate stack having at least a pad oxide layer formed on said surface of said silicon-containing substrate and a nitride layer formed on said pad oxide layer; (b) forming a trough in said gate stack stopping on said pad oxide layer exposing a portion of said pad oxide layer, said trough having vertical sidewalls; (c) forming a conformal silicon layer on said gate stack and in said trough, including said vertical sidewalls and said exposed pad oxide layer; (d) removing the conformal silicon layer from said gate stack and said exposed pad oxide layer whereby silicon remains on the vertical sidewalls of said trough; (e) removing the exposed pad oxide from said trough exposing a portion of the silicon-containing substrate; (f) oxidizing the silicon on said vertical sidewalls of the trough and in said exposed silicon-containing substrate forming oxide layers in said vertical sidewalls and on said exposed silicon-containing substrate; (g) forming doped polysilicon in said trough; (h) performing a second oxidation step in which an oxide layer is formed on a top surface of said doped polysilicon; (i) removing the remaining nitride layer of the gate stack forming a gate region which is protected on all sides by oxides; and (j) forming source and drain regions in said silicon-containing substrate.