The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2001

Filed:

Jun. 22, 1999
Applicant:
Inventors:

Masayuki Sonobe, Kyoto, JP;

Shunji Nakata, Kyoto, JP;

Yukio Shakuda, Kyoto, JP;

Tsuyoshi Tsutsui, Kyoto, JP;

Norikazu Itoh, Kyoto, JP;

Assignee:

Rohm LTD, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/120 ;
U.S. Cl.
CPC ...
H01L 2/120 ;
Abstract

A semiconductor light emitting device includes a substrate, an n-type layer formed of gallium-nitride based compound semiconductor formed on the substrate, and a p-type layer formed of gallium-nitride based compound semiconductor formed on the substrate. Semiconductor overlying layers are constituted by the n-type layer and the p-type layer on the substrate. A light emitting layer is formed together with the n-type and p-type layers in the semiconductor overlying layers to emit light. At least one of the n-type layer and the p-type layer is formed by three or more overlying sublayers including a sublayer of Al,Ga,N (0<y&lE;0.5) and a sublayer of Al,Ga,N (0&lE;u<y). With this structure, the semiconductor light emitting device is almost free from lattice mismatch to thereby enhance electron mobility and hence light emission efficiency even where the overlying semiconductor layers are different in lattice constant from the substrate.


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