The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2001
Filed:
Jul. 10, 1998
Euisu Park, Ann Arbor, MI (US);
Dawn M. Tilbury, Ann Arbor, MI (US);
Pramod P. Khargonekar, Ann Arbor, MI (US);
The Regents of the University of Michigan, Ann Arbor, MI (US);
Abstract
Method and system for creating a control-flow structure which represents control logic for use in a manufacturing system based on the system's timing bar chart are described. A modular representation of the control logic is described. In the setting of a high volume transfer line, each station of the line is considered as a module and a simple method to generate a Petri net representation from the timing bar chart is described. Modified reduction rule and locality property are applied to compose the logic of a Petri net module. Using the well known properties of the marked graph which is one of the subclasses of Petri nets, the qualitative characteristics of the logic controller of the system such as liveness, boundedness (safeness) and recoverability can be verified. A live and safe marked graph can be directly transformed into Grafcet (which is one of the EC 1131-3 languages) and, using this Grafcet representation, a logic controller can be implemented directly. The reconfigurability properties of this approach to implementation of logic controllers is also described.