Method for reducing transients in a clock signal generating system

Abstract

Methods reduce transients in a redundant clock system forming part of a switch in a telecommunication network. In general, the transients, normally in the form of phase steps, are caused by reconfigurations in the clock system. Examples of reconfiguration are an inclusion or an exclusion of a redundant clock generating circuit, referred to as a plane, or an activation of a network synchronization. These transients are eliminated by successively adding an increment to a variable representative of a physical quantity in the clock generating system. In the case of an inclusion of a plane or an activation of the network synchronization, a positive increment is successively added to the gain of an amplifier. In the case of an exclusion of a plane, an increment is successively added to a phase difference representing signal.