The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2001

Filed:

Jan. 10, 2000
Applicant:
Inventor:

William R. Pearson, Salem, VA (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 ;
U.S. Cl.
CPC ...
H03L 7/06 ;
Abstract

A phase lock loop with an improved capture and lock characteristics. A first displacement error signal, a quadrature error signal, and a second displacement error signal arc generated, the second displacement error signal combining the benefits of the first displacement error signal and the quadrature error signal to more closely approximate an ideal error signal and avoid false lock.


Find Patent Forward Citations

Pearson, William. (2001). Method and apparatus for improving capture and lock characteristics of phase lock loops (U.S. Patent No. 6255871). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6255871

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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