The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2001
Filed:
Aug. 01, 2000
Yukio Yasuda, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
An object is to reduce the offset voltage between the input and output in a wide range of output current with a simple circuit configuration. Transistors (Q,), (Q,) and (Q,) have a size ratio of m:n:1, transistors (Q,) and (Q,) have a size ratio of 1:p, and transistors (Q,) and (Q,) have a size ratio of {(m+n+1)/p:}). Accordingly a current which is (m+n+1) times the current flowing in the transistor (Q,) is supplied to the emitter electrodes of the transistors (Q,) and (Q,). Since the ratio between the currents flowing in the transistors (Q,) and (Q,) is the same as their size ratio m:n, the emitter-base voltages are equal between the transistors (Q,) and (Q,). As a result, the offset voltage between the voltage signal inputted to the input signal line (IN) and the voltage signal outputted from the output signal line (OUT) can be suppressed in a wide range of output current.