The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2001
Filed:
Jul. 15, 1999
Robin Hamilton, Fort William, GB;
Patrick Joseph Ryan, Thames Ditton, GB;
Derek Kelly, Borehamwood, GB;
Robert Julian Dickinson, London, GB;
Garvin David Wills, Southall, GB;
Intravascular Research Limited, Isleworth, GB;
Abstract
An ultrasound system includes a transducer array having a plurality of transducer elements for transmitting ultrasound pulses and for receiving-echo pulses in response thereto, a circuit for energizing each transducer element, or batches of elements of the array, in turn, to generate an ultrasound pulse, and for receiving echo signals from at least two transducer elements resulting from transmission of an ultrasound pulse from another transducer element so that data used to create an image of the echo signals comes from the two transducer elements, a control device for controlling the order in which the transducers are energized and the order in which the transducers receive an echo pulse so as to carry out the energization and reception sequentially, a circuit for acquiring sequentially the data in analog form for a whole aperture, for acquiring sequentially the data for successive apertures and for processing the data for beam-formation for each aperture in correspondence with an analog echo pulse received by each transducer such that appropriate data sets once acquired are used for beam-formation of more than one aperture, the circuit for acquiring and processing including a high speed memory, a circuit for loading filter coefficients into the high speed memory, and a circuit for varying the values of the filter coefficients.