The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2001

Filed:

Sep. 09, 1999
Applicant:
Inventors:

Karl Ernesto Thompson, Converse, TX (US);

Carlos Esteban Muñoz, Austin, TX (US);

Douglas S. Piasecki, Dripping Springs, TX (US);

Wai Laing Lee, Austin, TX (US);

Eric Swanson, Buda, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/02 ;
U.S. Cl.
CPC ...
H03F 1/02 ;
Abstract

A multistage comparator is calibrated to remove quasi-autozero voltages derived from the native comparator offset and autozero switch charge injection offsets. A multistage comparator includes a plurality of series connected amplifiers each having a programmable source, and further including a latch. A calibration method for a multistage comparator includes calibrating the first of a series of amplifiers first for both voltage offset and charge injection errors thereby to remove the quasi-autozero voltage and charge injection offsets.


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Quick Actions:

Thompson, Karl. (2001). Calibrated quasi-autozeroed comparator systems and methods (U.S. Patent No. 6252454). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6252454

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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