The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2001
Filed:
Oct. 05, 2000
Ke Wu, Fremont, CA (US);
David Kwong, Fremont, CA (US);
Pericom Semiconductor Corp., San Jose, CA (US);
Abstract
A differential amplifier has a wide common-mode input range since it uses two complementary amplifiers. One amplifier has a differential pair of n-channel transistors while the other amplifier has a differential pair of p-channel transistors. The input range is extended further by replacing the current mirror transistors with load resistors. The load resistors continue to supply current to the differential pair transistors even when the input is within a transistor-threshold of the power or ground rails. The current through the load resistors is mirrored to intermediate mirror transistors that have their gate connected to the resistor's terminal node. Current in the differential amplifiers is mirrored as if current-mirror transistors were present rather than the load transistors. The intermediate mirror transistors supply current to inverse-mirror transistors. Since the inverse mirror transistors are of the opposite type as the intermediate mirror transistors, the inverse mirror transistors continue to operate when the input voltage is in the extreme of the range that shuts off the intermediate mirror transistors. Outputs of the intermediate and inverse mirror transistors of the two amplifiers are connected together and buffered by a final stage.