The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2001

Filed:

Jul. 27, 1998
Applicant:
Inventor:

Sami Kiriaki, Plano, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/90175 ;
U.S. Cl.
CPC ...
H03K 1/90175 ;
Abstract

The invention relates to the interfacing of high speed, low voltage data streams with CMOS circuits and, more specifically, to converting low voltage, differential ECL signals levels to higher voltage levels which are compatible with CMOS circuits while maintaining high speed and sufficient drive capability. This is accomplished by making first stage inverters,and,as geometrically small as possible subject to the design rules in use to minimize the capacitance at the input of these inverters. The inputs of the first stage inverters are clamped by bias circuits,and,at DC levels so as to provide a narrow range of operation. Additional output inverters,and,act as buffers to provide the needed capacitive load drive capability.


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