The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2001

Filed:

Jul. 30, 1999
Applicant:
Inventors:

John W. Fattaruso, Dallas, TX (US);

Shivaling S Mahant-Shetti, Karnataka, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 1/12 ;
U.S. Cl.
CPC ...
H03M 1/12 ;
Abstract

An analog-to-digital converter (“ADC”,,) comprising an input (V,) for receiving an input analog voltage. The ADC further comprises a digital-to-analog circuit, comprising a meandering string (,′) of series connected resistive elements (R,′-R,′) having a plurality of voltage taps (T,′-T,′), as well as a number of bit lines (BL,′-BL,′) and a number of word lines (WL,′-WL,′). For a given input analog voltage, the given input analog voltage is closest to a voltage at a selected one of the plurality of taps. In addition, the selected one of the plurality of taps is associated with one of the number of bit lines and one of the number of word lines. Additionally, the ADC further comprises a flash circuit (,CAT,′-CAT,′) coupled to receive the input analog voltage from the input and in response to identify either the one of the number of bit lines or the one of the number of word lines. Lastly, the ADC comprises an output (V,) for providing a digital output value in part in response to the identified one of the number of bit lines or the one of the number of word lines.


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