The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2001
Filed:
Aug. 30, 2000
Jeff L. Nilles, Los Altos, CA (US);
Darryl Byron Phillips, Milpitas, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A DC-to-DC converter having multiple power channels and a switching controller which generates a pulse-width modulated control signal for each power channel, and a switching controller for use in (and a method for generating power switch control signals for) such a converter. The control signals are generated in response to trigger signal trains generated by trigger channels. The trigger channels rotate relative to the power channels so that the control signals are generated in response to a sequence of trigger channel states. In some embodiments, the controller has one control signal channel and one trigger channel for each power channel. In other embodiments, there are N power channels, N control signal channels, and M reset channels (each for generating a trigger signal train), where M is an integer greater than N. The extra channel or channels is used for preventing rotation errors which would otherwise delay opening of the closed power switches. Preferably, the sequence of trigger channel states is a periodic sequence in which each trigger channel is provided sequentially to a repeating sequence of the control signal channels, but it is alternatively a non-periodic sequence in which each trigger channel is provided equally on a time-averaged basis to each control signal channel. In some embodiments, each time interval between rotations is sufficiently long to avoid significant problems due to rotation errors which can result from rotation of trigger channels during a power switch cycle). In some embodiments, the controller includes logic circuitry for preventing operation at 100% duty cycle which would otherwise cause energy transfer problems in some applications, such as boost, inverting and transformer coupled circuits.