The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2001

Filed:

Oct. 20, 2000
Applicant:
Inventor:

Mathew A. Nieberger, Rocklin, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/56 ;
U.S. Cl.
CPC ...
G05F 1/56 ;
Abstract

Techniques are disclosed for converting available electrical power to desirable electrical power. One embodiment of the techniques calls for a boost circuit to convert low power W,at a terminal T,to high power W,at a terminal T,. The boost circuit includes a voltage generation circuit, a capacitor C,, a timing-control generator, and a boost regulator. The voltage generation circuit converts voltage V,at terminal T,to voltage V,at a terminal T,wherein, in one embodiment, V,is less than V,. Further, the current I,provided by the voltage generation circuit at terminal T,is less than the current I,at terminal T,. In one embodiment, capacitor C,, being charged by current I,, stores necessary charge to provide appropriate currents and voltages to the boost regulator. The timing-control generator uses voltages V,and V,to provide a timing-control signal T,, which controls the timing operation of the boost regulator. In one embodiment, T,resets the boost regulator until capacitor C,accumulates enough charge to provide appropriate power to the load at terminal T,through the boost regulator. The boost regulator, when in operation, converts V,to V,.


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