The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2001

Filed:

Apr. 01, 1999
Applicant:
Inventor:

George Hickert, Colorado Springs, CO (US);

Assignee:

Ramtron International Corporation, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18242 ;
U.S. Cl.
CPC ...
H01L 2/18242 ;
Abstract

A continuous barrier layer is formed after a local interconnect metal layer is formed between the top electrode of a ferroelectric capacitor and the source/drain contact of a memory cell transistor in an integrated ferroelectric memory. After contact has been made to the top electrode of the ferroelectric capacitor, a thin dielectric layer is deposited using a material that provides an effective hydrogen barrier to the ferroelectric capacitor. The barrier layer minimizes damage to the ferroelectric capacitor and thus improves electrical performance.


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