The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2001
Filed:
Dec. 17, 1999
Sung-Ho Bae, Ichon-shi, KR;
Jong-Hee Han, Ichon-shi, KR;
Hyundai Electronics Industries Co., Ltd., Ichon, KR;
Abstract
Disclosed is a semiconductor memory device capable of improving a timing margin in a logic circuit using a signal latch. The semiconductor memory device according to the present invention includes an address generator including a latch circuit, wherein the address generator receives an external address signal from an external circuit and latches the external address signal in response to a control signal; and a Y-predecoder for receiving outputs from the address generator and for generating a pulse in response to the control signal. Accordingly, the semiconductor memory device according to the present invention transfers a signal at safety without considering a separate timing margin, by using the control signal in an adjacent circuit as an enable signal.