The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2001

Filed:

Jan. 20, 1999
Applicant:
Inventors:

Tony Ngai, Campbell, CA (US);

Sergey Shumarayev, San Leandro, CA (US);

Sammy Cheung, Pleasanton, CA (US);

Rakesh Patel, Cupertino, CA (US);

Vinson Chan, El Cerrito, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/9177 ;
U.S. Cl.
CPC ...
H03K 1/9177 ;
Abstract

Techniques for providing high-performance interconnect for integrated circuits will improve overall integrated circuit performance. These techniques include arranging, laying out, and fabricating the signal conductors (e.g.,,) so the parasitic coupling capacitances (e.g.,,) are minimized and parasitic resistance is reduced. The techniques will minimize effects of crosstalk noise between the conductors, and thus improve overall integrated circuit performance.


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