The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2001
Filed:
Sep. 23, 1999
Applicant:
Inventor:
Chester Lamar Harris, Orlando, FL (US);
Assignee:
Agere Systems Guardian Corporation, Berkeley Heights, NJ (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1311 ;
U.S. Cl.
CPC ...
H01L 2/1311 ;
Abstract
A process for the manufacture of semiconductor integrated circuits is described in which the defect density due to conductive particle debris formed at the edge of the wafer is reduced by burying the edges of the metal layers in a tapered step configuration, so that the maximum steps in the interlevel and final dielectric layers are essentially the same as the thickness of the metal layers.
Harris, Chester. (2001). Semiconductor wafer fabrication (U.S. Patent No. 6239035). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6239035
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile