The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2001

Filed:

Jun. 16, 1999
Applicant:
Inventors:

Kalipatnam V. Rao, Richmond, VA (US);

Richard L. Guldi, Dallas, TX (US);

Kueing-Long Chen, Plano, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/176 ;
Abstract

A method of forming a semiconductor device includes forming a moat stack outwardly from a substrate, the moat stack comprising a dielectric pad disposed outwardly from the substrate, a silicon buffer structure disposed outwardly from the dielectric pad, and a protective dielectric cap disposed outwardly from the silicon buffer structure. The method further comprises forming a protective sidewall structure outwardly from at least a sidewall of the silicon buffer structure, forming an isolation dielectric region adjacent to the moat stack, after formation of the isolation dielectric region, removing the protective dielectric cap, and forming a conductive gate comprising the silicon buffer structure.


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