The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2001

Filed:

Feb. 26, 1996
Applicant:
Inventors:

Paul L. Master, Mountain View, CA (US);

William T. Hatley, San Jose, CA (US);

Walter J. Scheuermann II, Saratoga, CA (US);

Margaret J. Goodman, San Jose, CA (US);

Assignee:

ARGOSystems, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/300 ;
Abstract

Processor methods and apparatus for adaptable network processing having speed advantages often associated with hardware implementations of network processing code or logic, as is often achieved using ASICs, for example, but at the same time having reconfigurability advantages often associated with software implementations of this code or logic. Methods and apparatus are described for adaptable hardware devices, such as a field programmable gate array (FPGA) or a circuit using FPGAs, to execute network processing code or logic. Methods and apparatus are described for using a software based device to program adaptable hardware devices to implement desired network processing code or logic.


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