The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2001

Filed:

Jul. 17, 2000
Applicant:
Inventors:

Mark W. Morgan, Allen, TX (US);

Fernando D. Carvajal, Fairview, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ; G06G 7/12 ; H03K 3/59 ;
U.S. Cl.
CPC ...
H03L 5/00 ; G06G 7/12 ; H03K 3/59 ;
Abstract

A circuit (,) operates at relatively low values of the supply voltage, and includes a differential input circuit (,) which receives a differential input signal at first and second terminals (,). A differential voltage derived by the input circuit from the differential input signal is present at third and fourth terminals (,) and is amplified by a differential amplifier (,). A differential level adjuster (,) adjusts output voltages from the amplifier to suitable values for application to a matcher (,). The matcher (,) generates two currents that also flow within a differential compensator (,), and that match respective currents flowing in the amplifier. The differential compensator then provides a suitable current to each of the third and fourth terminals, such that the current flow between the first and third terminals, and between the second and fourth terminals, is substantially zero.


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