The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2001
Filed:
Jan. 14, 1999
Elan Tsvi Yaniv, Austin, TX (US);
David James Martens, Sunnyvale, CA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Each bitslice multiplexing structure of a rotator circuit is configured as a plurality of first stage 8:1 multiplexers each receiving eight of the rotator circuits as inputs and one second-stage 8:1 multiplexer receiving the outputs of the first-stage multiplexers are inputs. To achieve the desired functionality with a single set of shift input signals, the rotator inputs to the first-stage multiplexers are changed for different bitslice multiplexing structures within the rotator, and the connection of the first-stage multiplexer outputs to the second-stage multiplexer inputs are changed for different groups of bitslice multiplexing structures. The first-stage multiplexers are positioned between two input buses running across the entire width of the rotator circuit. Any input of the first-stage multiplexer may be connected a input signal conductor within the input buses above or below the first-stage multiplexer, and the input buses and the first-stage multiplexers are distributed on opposite sides of the second-stage multiplexer. This limits the number of wires required in one metallization level for the vertical direction to twelve at any horizontal cross-section of the bitslice multiplexing structure. The resulting rotator circuit has an improved aspect ratio, more efficient circuit area usage, and better overall circuit performance for performing rotate operations from 0 to 63 bits on 64-bit operands.