The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2001

Filed:

Mar. 05, 1999
Applicant:
Inventor:

Hidehiko Tanaka, Nara, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

The present invention is to provide a method for designating a memory bank to be refreshed efficiently and a start and termination procedure of a self-refresh. In a dynamic RAM including a plurality of memory banks,A,,B, memory access actions being allowed to be independently on the respective memory banks, and a refresh control circuit for allowing the plurality of memory banks,A,,B to be refreshed in a lump and for allowing one memory bank,A or,B of the plurality of memory banks designated to be refreshed, a semiconductor memory device is configured such that when a row address input terminal or one of specific input terminals other than the row address input terminal is at a high level, the plurality of memory banks are refreshed in a lump; and when the row address input terminal or one of specific input terminals other than the row address input terminal is at a low level, one of the plurality of memory banks is designated to be refreshed in accordance with a bank selecting bit composed of one bit or a combination of a plurality of bits of row addresses other than the row address.


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