Apparatus and method for transferring data in a data communications device

Abstract

A computerized method and apparatus transfers data between source and destination memories using a programmed input/output loop executing on a central processing unit which controls a cache memory to perform the data transfer. Blocks of the cache are mapped to respective source and a destination memories, which are preferably I/O memories associated with I/O devices. Cache transfers are done using bursting which allows multiple data units to be returned in response to a single request for data. To perform the transfer of data, a source block in the cache is cleared and multiple memory units are read into the source block in the cache via bursting. A destination block in the cache which is mapped to the destination memory is then cleared and the source block in the cache is written to the destination block in the cache. Finally, the destination block in the cache is flushed out via bursting into the destination memory. The clearing of the source and destination blocks in the cache may be done concurrently with the reading and writing of data blocks. Through the use of the programmed input/output loop and bursting, overall data throughput and transfer rates can exceed throughput rates of a DMA unit configured for a similar transfer. Bursting provides minimal system bus overhead. Preferred embodiments are implemented using the Motorola MPC860 PowerPC microprocessor.