The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2001
Filed:
Dec. 24, 1997
James Douglas Dworkin, Chandler, AZ (US);
Michael John Torla, Chandler, AZ (US);
P. Michael Glaser, Tempe, AZ (US);
Ashok Vadekar, Mississauga, CA;
Robert John Lambert, Hespeler, CA;
Scott Alexander Vanstone, Waterloo, CA;
Other;
Abstract
A finite field multiplier with intrinsic modular reduction includes an interface unit (,) that translates an n bit wide data path to a m bit wide data path where n is less than m. Also included is a finite field data unit (,) with m bit wide registers that is coupled to a finte field control unit (,). The finite field control unit (,) includes a microsequencer (,) and a finite state machine multiplier (,). The microsequencer (,) controls the finite state machine multiplier (,) which performs a finite field multiply operation with intrinsic modular reduction and presents a finite field multiplication product to the finite field data unit (,).