The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2001

Filed:

Sep. 30, 1999
Applicant:
Inventors:

Anthony Correale, Jr., Raleigh, NC (US);

Robert James Lynch, Raleigh, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

A system and method of controlling the operation of a storage device (a semiconductor latch in its preferred embodiment) to reduce the power consumed by the storage device. The system uses a split clock signal to control the operation of the latch, with an early enable signal and a late enable signal being operable to turn the latch on when needed and to turn it off when it is not needed. More particularly, the present invention logically generates clocking control signals for the latch using the early enable signal and the late enable signal to control the operation of the latch and to reduce power consumption and allow for an increased period of time to make a decision whether to turn off the early enable signal. One clock input is generated from one of the enable signals and the other is a function of both of the enable signals and the redundant enable signal is used in an AND gate late in the generation of the clocking signal, thus using a redundancy in the enable signals to control one of the clock inputs and provide control of the storage device for an extended period of time.


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