The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2001

Filed:

Aug. 20, 1999
Applicant:
Inventors:

Jerome F. Duluk, Jr., Palo Alto, CA (US);

Richard E. Hessel, Pleasanton, CA (US);

Vaughn T. Arnold, Scotts Valley, CA (US);

Jack Benkual, Cupertino, CA (US);

Joseph P. Bratt, San Jose, CA (US);

George Cuan, Sunnyvale, CA (US);

Stephen L. Dodgen, Boulder Creek, CA (US);

Emerson S. Fang, Fremont, CA (US);

Zhaoyu Gong, Cupertino, CA (US);

Thomas Y. Ho, Fremont, CA (US);

Hengwei Hsu, Fremont, CA (US);

Sidong Li, San Jose, CA (US);

Sam Ng, Fremont, CA (US);

Matthew N. Papakipos, Menlo Park, CA (US);

Jason R. Redgrave, Mountain View, CA (US);

Sushma S. Trivedi, Sunnyvale, CA (US);

Nathan D. Tuck, San Diego, CA (US);

Assignee:

Apple Computer, Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 1/20 ;
U.S. Cl.
CPC ...
G06T 1/20 ;
Abstract

Three-dimensional computer graphics systems and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch decode (,), a geometry unit (,), a mode extraction (,) and polygon memory (,), a sort unit (,) and sort memory (,), a setup unit (,), a cull unit (,), a mode injection (,), a fragment unit (,), a texture (,) and texture memory (,) a phong shading (,), a pixel unit (,), a backend unit (,) coupled to a frame buffer (,). Other embodiments need not include all of these functional units, and the structures and methods of these units are applicable to other computational processes and systems as well as deferred and non-deferred shading graphical processors.


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