The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2001

Filed:

May. 30, 2000
Applicant:
Inventors:

Jan-Erik Eklund, Linköping, SE;

Mikael Rudberg, Linköping, SE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 1/10 ;
U.S. Cl.
CPC ...
H03M 1/10 ;
Abstract

An analog-to-digital converter (ADC) has a histogram based correction of static errors. In a control and calculating unit (,) of the converter thus the counts of uncorrected digital output codes are stored in a memory (,). From the stored counts a model distribution is determined in a calculation unit, e.g. by estimating an expected gaussian distribution. The model distribution is compared to the measured counts and relative errors of the counts are calculated, the relative errors indicating errors in coarse reference levels. The errors are used for calculating correction terms (L(A)) stored in a correction table (,). The correction terms are used by an output calculating unit (,′) to calculate corrected, more accurate output codes. For a parallel ADC device having several cells, the histograms in the cells can be used to correct for gain and offset errors. Also, the histogram can be used in a built-in self test. A reference level generator can be only partially common to the cells in a parallel ADC providing accurate coarse levels without cross-talk.


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