The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2001
Filed:
Mar. 09, 2000
Erkki Miettinen, Helsinki, FI;
ABB Industry Oy, , FI;
Abstract
A stabilized gate driver which comprises a current source transformer (T) which comprises a primary and a secondary coil, and a gate driver unit (GD) which includes a positive auxiliary voltage input (Va+) and a negative auxiliary voltage input (Va−). The gate driver also comprises a diode (D) the anode of which is connected to the positive pole of the secondary coil of the current source transformer (T), a zener diode (Z) the cathode of which is connected to the cathode of the diode (D), resistance (R) whose one pole is connected to the anode of the zener diode (Z) and the other pole to the negative pole of the secondary coil of the current source transformer (T), a first semiconductor switch (T,) the control electrode (B) of which is connected to the point between the zener diode and the resistance, and the collector of which is connected to the cathode of the zener diode, a second semiconductor switch (T,) the control electrode (B) of which is connected to the point between the zener diode and the resistance and the collector of which is connected to the negative pole of the secondary coil of the current source transformer (T) and the emitter to the emitter of the first semiconductor switch (T,), a first capacitance (C,) the first pole of which is connected to the collector of the first semiconductor switch (T,) and the second pole to the emitter of the second semiconductor switch (T,), the first pole of the capacitance (C,) forming a positive voltage input (V+) which is connected to the positive auxiliary voltage input (Va+) of the gate driver unit (GD), and a second capacitance (C,) the first pole of which is connected to the emitter of the second semiconductor switch (T,) and the second pole to the collector of the second semiconductor switch (T,), the second pole of the capacitance (C,) forming a negative voltage input (V−) which is connected to the negative auxiliary voltage input (Va−) of the gate driver unit (GD), in which case a point between the capacitances (C,, C,) forms a zero potential (Com).