The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2001

Filed:

Sep. 25, 1998
Applicant:
Inventors:

Toru Nishikawa, Yokohama, JP;

Ryohei Satoh, Yokohama, JP;

Masahide Harada, Yokohama, JP;

Tetsuya Hayashida, Tokyo, JP;

Mitugu Shirai, Hatano, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23K 3/102 ; B23K 1/20 ; B23K 2/600 ;
U.S. Cl.
CPC ...
B23K 3/102 ; B23K 1/20 ; B23K 2/600 ;
Abstract

In soldering together two members such as electronic circuit devices, after an oxide or contaminated layer has been removed from the surface of a solder material or bonding pad, for example, the members are aligned in an oxidizing atmosphere. Then the solder material is heated in a nonoxidizing atmosphere to melt the solder and bond the members. Cleaning of the solder material or bonding pad is performed by sputter-cleaning, laser cleaning, mechanical polishing, or cutting.


Find Patent Forward Citations

Nishikawa, Toru. (2001). Method of fabricating an electronic circuit device and apparatus for performing the method (U.S. Patent No. 6227436). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6227436

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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