System and method for arranging, accessing and distributing data to achieve zero cycle penalty for access crossing a cache line

Abstract

A data processing system and method for arranging and accessing information that crosses cache lines utilize dual cache columns. The dual cache columns are formed of two access-related cache lines. The two cache columns contain sequential information that is stored in cache lines in a sequential and alternating format. A processor makes a request for a particular instruction. An instruction fetch unit takes the instruction request and creates a second instruction request in addition to the first instruction request. The two instruction requests are sent simultaneously to first and second content addressable memories (CAMs) respectively associated with the first and second cache columns. The CAMs are simultaneously searched and any cache hits are forwarded to a switch. The switch combines the relevant portions of the two cache lines and delivers the desired instruction to a processor. A method of accessing and distributing stored data in a computer system is also described. The method includes generating the data to be distributed by combining relevant segments from simultaneously accessed first and second cache lines.