The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2001

Filed:

Jun. 18, 1998
Applicant:
Inventor:

Timothy J. Earnest, Vadnais Heights, MN (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 ; H04L 2/500 ; H04L 2/540 ;
U.S. Cl.
CPC ...
H04L 7/00 ; H04L 2/500 ; H04L 2/540 ;
Abstract

A multiple-channel data communication buffer includes a transmit first-in-first-out (“FIFO”) circuit and a receive FIFO circuit. The transmit and receive FIFO circuits each include a write pointer array, a read pointer array and a single memory device having a data input, a data output, a write address input, a read address input and a plurality of logical channels from the data input to the data output. The write pointer array has a write pointer for each of the logical channels and applies a selected one of the write pointers to the write address input based on a write channel number input. The read pointer array has a read pointer for each of the logical channels and applies a selected one of the read pointers to the read address input based on a read channel number input.


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