The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2001

Filed:

Jun. 08, 1998
Applicant:
Inventor:

Hiroaki Yada, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B 5/09 ; G11B 2/010 ; G11B 2/110 ;
U.S. Cl.
CPC ...
G11B 5/09 ; G11B 2/010 ; G11B 2/110 ;
Abstract

A clock generator applicable to a sample servo type magnetic disk drive is disclosed. Reproduced signals z(t) from a clock pattern are digitized by an A/D converter (,) before being fed to a phase comparator (,). An arithmetic unit (,) calculates an inner product of N sampled values and N weighting factors in a linear combination, and a D flip-flop (,) provides a phase comparison error signal f(&thgr;). The signal f(&thgr;) is converted by a D/A converter (,) to analog format before being supplied as a control signal to a VCO (,) via a loop filter (,). A clock signal CLK from the VCO (,) is controlled in phase so as to generate a clock signal CLK synchronized with the reproduced signals z(t). When the weighting factors are arranged so that their total sum becomes zero, the signal f(&thgr;) is free from adverse effects of DC elements superposed on the reproduced signals z(t), whereby a clock signal CLK in precise synchronism with the reproduced signal z(t) is obtained.


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