The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2001

Filed:

Feb. 25, 2000
Applicant:
Inventor:

Tom G. Lei, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/08 ;
U.S. Cl.
CPC ...
H03K 5/08 ;
Abstract

A boost level clamping circuit and a method for clamping a boosted wordline voltage from a booster circuit used in a semiconductor memory device is provided which is power supply and process corner independent. The clamping circuit is formed of a plurality of parallel-connected clamp stages connected to the boosted wordline voltage from the booster circuit. Each of the plurality of clamp stages serves to clamp the boosted wordline voltage at different predetermined levels. Each of the clamp stages is formed of a sampling circuit, a comparator circuit, a pulse generator circuit, and a pull-down circuit.


Find Patent Forward Citations

Lei, Tom. (2001). High speed, high precision, power supply and process independent boost level clamping technique (U.S. Patent No. 6225849). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6225849

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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