The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2001
Filed:
Feb. 29, 2000
Applicant:
Inventors:
Keith A. Tilley, Round Rock, TX (US);
Raul Salvi, Miami, FL (US);
Enrique Ferrer, Miami, FL (US);
Atif A. Meraj, Plantation, FL (US);
David J. Graham, Gilbert, AZ (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/08 ;
U.S. Cl.
CPC ...
H03K 5/08 ;
Abstract
A DC offset correction loop (,) utilizes a sign bit generator (,), binary search stage (,), and a digital-to-analog converter (,) in its feedback path to correct for DC offsets at the input of a gain stage (,). When a correction value is obtained, it is applied and held (,) to compensate for the DC offset. When a programming event occurs (,), such as detecting an increase in DC offset beyond a threshold, detecting a significant temperature change, or passage of time, a new DC offset correction cycle is initiated.