The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2001
Filed:
Jan. 15, 1998
Yosuke Miyoshi, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
To provide a fabrication method of compound semiconductor devices which can improve the problems of conventional MESFETs, such as the breakdown voltage degradation owing to increase of the gate leak current or the electron traps in the passivation film, the drain current decrease because of the gate-lag, or the threshold voltage dispersion caused by the interfacial tension, and easily restrain the emitter-size effect of conventional mesa type HBT without revising or complicating its epitaxial layer structure, a fabrication method according to the invention of a semiconductor device having a high-resistance film (,) covering a part of a surface other than electrodes (,and,) of the semiconductor device comprises a step of depositing the high-resistance film (,) by way of catalytic CVD. The fabrication method preferably further comprises a step of surface cleaning performed before the step of depositing for cleaning the surface of the semiconductor device by a gas including active hydrogen flowing on the surface. As for the high-resistance film, a material including no oxygen such as SiN is applied.