The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2001
Filed:
Aug. 30, 1999
Sang-Soo Lee, Cupertino, CA (US);
Tzu-Wang Pan, San Jose, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A system and method for reduced metastability errors in an analog-to-digital converter (“ADC”) are disclosed. The ADC comprises comparators configured to output a thermometer code and a thermometer-to-binary encoder for converting the thermometer code to a digital output. The thermometer-to-binary encoder includes a transition detection logic to generate a transition codeword having at least one transition bit corresponding to a transition point in the thermometer code, an intermediate encoding logic to encode the transition codeword into first intermediate signals, a converter logic to convert the first intermediate signals into converted intermediate signals such that same converted intermediate signals result from first intermediate signals corresponding to a transition codeword having more than one transition bit and first intermediate signals corresponding to another transition codeword having one of the more than one transition bit, and a converted signals mapper for mapping the converted signals to the digital output. The transition detection logic may include inverters and AND gates where a threshold voltage of each inverter is preferably greater than a threshold voltage of each corresponding AND gate to which the output of each inverter is input.