Voltage controlled ring oscillator delay

Abstract

A delay cell for use within a voltage controlled oscillator capable of operating at two different selectable frequencies, the delay cell having a first delay stage including a first differential pair of transistors, wherein the emitter or each transistor is coupled to a first common node and further wherein a first current exiting the first common node is selectively variable. The delay cell further having a second delay stage including a second differential pair of transistors, each having an emitter coupled to a second common node wherein a second current exiting the second common node is selectively variable and wherein a sum of the first current and the second current is substantially constant. The amount of delay associated with the first delay stage is dependent upon the level of the first current. The delay cell provides for a more linear relationship between output frequency and input voltage by controlling the first current through the first delay stage and the second current through the second delay stage such that a decrease in the first current is accompanied by an increase in the second current and, conversely, an increase in the first current is accompanied by a decrease in the second current and the sum of the first current and second current is substantially constant.